Home
last modified time | relevance | path

Searched refs:DRM_MODE_FLAG_PHSYNC (Results 1 – 11 of 11) sorted by relevance

/rk3399_rockchip-uboot/common/
H A Dedid.c179 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
184 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
261 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
328 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
333 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
368 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/
H A Ddrm_modes.c224 dmode->flags |= DRM_MODE_FLAG_PHSYNC; in drm_display_mode_from_videomode()
262 if (dmode->flags & DRM_MODE_FLAG_PHSYNC) in drm_display_mode_to_videomode()
H A Dinno_hdmi.c424 value |= mode->flags & DRM_MODE_FLAG_PHSYNC ? BIT(4) : 0; in inno_hdmi_config_video_timing()
430 value |= mode->flags & DRM_MODE_FLAG_PHSYNC ? in inno_hdmi_config_video_timing()
H A Drockchip_tve.c34 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
40 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
H A Ddw_hdmi.c1112 inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ? in hdmi_av_composer()
2019 hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ? in hdmi_tx_hdcp_config()
H A Ddw-dp.c1264 if (mode->flags & DRM_MODE_FLAG_PHSYNC) in dw_dp_video_enable()
H A Drockchip_display.c423 flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; in rockchip_ofnode_get_display_mode()
/rk3399_rockchip-uboot/include/
H A Ddrm_modes.h27 #define DRM_MODE_FLAG_PHSYNC (1 << 0) macro
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628.c321 vm->flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; in of_parse_rk628_display_timing()
H A Drk628_hdmirx.c196 flags |= DRM_MODE_FLAG_PHSYNC; in rk628_hdmirx_get_timing()
H A Drk628_post_process.c1472 if (src->flags & DRM_MODE_FLAG_PHSYNC) in rk628_post_process_init()