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Searched refs:DP_PLL_RESET (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Ddp.h261 #define DP_PLL_RESET (0x1 << 6) macro
/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp.h395 #define DP_PLL_RESET (0x1 << 6) macro
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c287 reg |= DP_PLL_RESET; in exynos_dp_init_analog_func()
294 reg &= ~(DP_PLL_RESET); in exynos_dp_init_analog_func()