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Searched refs:DDR_PCTL2_STAT (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_pctl_px30.h16 #define DDR_PCTL2_STAT 0x4 macro
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Dsdram_rk3328.c376 while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0) in sdram_init()
H A Dsdram_px30.c440 while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0) in sdram_init_()
H A Dsdram_rv1126.c1353 if (((readl(pctl_base + DDR_PCTL2_STAT) & in enter_sr()
1356 ((readl(pctl_base + DDR_PCTL2_STAT) & in enter_sr()
1363 while ((readl(pctl_base + DDR_PCTL2_STAT) & in enter_sr()
2621 while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0) { in sdram_init_()
3403 while ((readl(pctl_base + DDR_PCTL2_STAT) & in ddr_set_rate()