| /rk3399_rockchip-uboot/arch/x86/cpu/queensbay/ |
| H A D | Kconfig | 30 bool "Add a Chipset Micro Code state machine binary" 32 Select this option to add a Chipset Micro Code state machine binary 38 string "Chipset Micro Code state machine filename" 42 The filename of the file to use as Chipset Micro Code state machine 46 hex "Chipset Micro Code state machine binary location"
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| /rk3399_rockchip-uboot/board/armltd/integrator/ |
| H A D | README | 47 Code Hierarchy Applied : 49 Code specific to initialization of a particular ARM processor has been placed in 60 Code specific to the initialization of the CM, rather than the cpu, and initialization
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| /rk3399_rockchip-uboot/lib/zlib/ |
| H A D | trees.c | 168 # define send_code(s, c, tree) send_bits(s, tree[c].Code, tree[c].Len) 174 send_bits(s, tree[c].Code, tree[c].Len); } 311 static_dtree[n].Code = bi_reverse((unsigned)n, 5); in tr_static_init() 344 fprintf(header, "{{%3u},{%3u}}%s", static_ltree[i].Code, in gen_trees_header() 350 fprintf(header, "{{%2u},{%2u}}%s", static_dtree[i].Code, in gen_trees_header() 608 tree[n].Code = bi_reverse(next_code[len]++, len); 611 n, (isgraph(n) ? n : ' '), len, tree[n].Code, next_code[len]-1));
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| H A D | deflate.h | 74 #define Code fc.code macro
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.Heterogeneous-SoCs | 9 Code for DSP side awareness provides such functionality for Freescale 19 Code added in this file to print the DSP cores and other device's(CPRI,
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| H A D | README.imx6 | 151 Freescales Code Signing Tool to sign both binaries. After creation, 180 The CST (Code Signing Tool) can be downloaded from NXP.
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| H A D | README.menu | 79 Example Code
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| H A D | README.log | 125 Code size 128 Code size impact depends largely on what is enabled. The following numbers are
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| H A D | README.mxc_hab | 58 Encrypted Boot. The image is encrypted by Freescale's Code
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| H A D | README.unaligned-memory-access.txt | 70 Code that does not cause unaligned access 139 Code that causes unaligned access
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| H A D | README.ramboot-ppc85xx | 68 Necessary Code changes Required:
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| H A D | README.imximage | 107 Freescale Code Signing Tool, available on the
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| H A D | README.x86 | 96 * mrc.bin - Memory Reference Code, which sets up SDRAM 127 * mrc.bin - Memory Reference Code, which sets up SDRAM 211 also requires a Chipset Micro Code (CMC) state machine binary to be present in 1009 to be taken care of. The first important part is the Memory Reference Code (MRC)
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| H A D | README.armada-secureboot | 67 CSK - Code Signing Key(s): An array of RSA key pairs, which
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/ |
| H A D | lowlevel_init.S | 62 @ call ROM Code API for the service requested
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | u-boot.lds | 108 * this is a temporary fix. Code to dynamically the fixup the bss
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| /rk3399_rockchip-uboot/drivers/fpga/ |
| H A D | ivm_core.c | 296 static signed char ispVMShift(signed char Code); 297 static signed char ispVMAmble(signed char Code); 1718 signed char ispVMAmble(signed char Code) in ispVMAmble() argument 1743 switch (Code) { in ispVMAmble() 1865 Code = GetByte(); in ispVMAmble() 1866 if (Code == CONTINUE) { in ispVMAmble()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/input/ |
| H A D | cros-ec-keyb.txt | 28 * RR=Row CC=Column KKKK=Key Code
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | exynos5420-peach-pit.dts | 172 * DPCD40A, Initial Code major revision 176 /* DPCD40B Initial Code minor revision '05' */
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| H A D | exynos5250-spring.dts | 608 /* DPCD40A Initial Code major revision '01' */ 610 /* DPCD40B Initial Code minor revision '05' */
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/ |
| H A D | nvidia,tegra186-gpio.txt | 19 Access to this set of registers is not necessary in all circumstances. Code 21 registers to do so. Code which simply wishes to read or write GPIO data does not
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| /rk3399_rockchip-uboot/arch/x86/ |
| H A D | Kconfig | 363 FSP is not Position Independent Code (PIC) and the whole FSP has to 434 the resulting U-Boot image. MRC stands for Memory Reference Code. 491 bool "Add a Reference Code binary" 493 Select this option to add a Reference Code binary to the resulting
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| /rk3399_rockchip-uboot/board/ti/ks2_evm/ |
| H A D | README | 86 Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
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| /rk3399_rockchip-uboot/doc/uImage.FIT/ |
| H A D | howto.txt | 51 is used to ship multiple device tree files within one image. Code in the SPL
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| /rk3399_rockchip-uboot/doc/driver-model/ |
| H A D | of-plat.txt | 54 - It is not possible to find a value given a property name. Code must use
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