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Searched refs:CRU_GLB_RST_CON_OFFSET (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c415 #define CRU_GLB_RST_CON_OFFSET (0xC10U) macro
425 writel(0xFFDF, CRU_BASE_ADDR + CRU_GLB_RST_CON_OFFSET); in pcie_first_reset()