Searched refs:routing (Results 1 – 10 of 10) sorted by relevance
5 allows EL3 software to configure the interrupt routing behavior. Its main69 A routing model for a type of interrupt (generated as FIQ or IRQ) is defined as73 routed to EL3. A routing model is applicable only when execution is not in EL3.75 The default routing model for an interrupt type is to route it to the FEL in78 Valid routing models81 The framework considers certain routing models for each type of interrupt to be83 following sub-sections describe all the possible routing models and specify99 secure state. This is a valid routing model as secure software is in103 state. This is a valid routing model as secure software in EL3 can107 non-secure state. This is an invalid routing model as a secure interrupt[all …]
1218 If there is a pending error then, handle them based on routing model of EA's. Refer to1220 routing models.
280 unsigned int routing; in sdei_event_routing_set() local312 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_routing_set()326 plat_ic_set_spi_routing(map->intr, routing, (u_register_t) mpidr); in sdei_event_routing_set()342 unsigned int routing; in sdei_event_register() local442 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_register()444 plat_ic_set_spi_routing(map->intr, routing, in sdei_event_register()
26 management and interrupt routing.51 execution of RMM with the necessary routing of RMI commands as specified in
224 This API should set the routing mode of Share Peripheral Interrupt (SPI)238 the routing.
26 interrupt routing model, TF-A appropriately sets the ``FIQ`` and ``IRQ`` bits of27 ``SCR_EL3`` register to effect this routing. For most use cases, other than for150 interrupts at S-EL1. Essentially, this deprecates the routing mode described537 interrupts. This also results in setting the routing bits in ``SCR_EL3``.
82 * The handler reflects pending async EAs back to the lower EL if the EA routing model is KFH
582 entrypaths and at all the possible exception handlers routing to EL3 at runtime.
1140 routing model which routes non-secure interrupts asynchronously from TSP1142 for saving and restoring the TSP context in this routing model. The1143 default routing model (when the value is 0) is to route non-secure
4431 …- restrict secure world FIQ routing model to SPM_MM ([7671008](https://review.trustedfirmware.org/…10687 - arm/n1sdp: Setup multichip gic routing table, update platform macros for12631 - Enabled wake-up from CPU_SUSPEND to stand-by by temporarily re-routing12800 - Support has been added to demonstrate routing of IRQs to EL3 instead of S-EL113138 (using GICv2 routing only). Demonstrated this working by adding an interrupt