Searched refs:list_idx (Results 1 – 4 of 4) sorted by relevance
79 int dram_idx, int list_idx, in populate_tzc400_reg_list() argument85 if (list_idx == 0) { in populate_tzc400_reg_list()88 list_idx++; in populate_tzc400_reg_list()93 tzc400_reg_list[list_idx].reg_filter_en = 1; in populate_tzc400_reg_list()94 tzc400_reg_list[list_idx].start_addr = dram_start_addr + dram_size; in populate_tzc400_reg_list()95 tzc400_reg_list[list_idx].end_addr = dram_start_addr + dram_size in populate_tzc400_reg_list()97 tzc400_reg_list[list_idx].sec_attr = TZC_REGION_S_RDWR; in populate_tzc400_reg_list()98 tzc400_reg_list[list_idx].nsaid_permissions = TZC_REGION_NS_NONE; in populate_tzc400_reg_list()99 list_idx++; in populate_tzc400_reg_list()102 tzc400_reg_list[list_idx].reg_filter_en = 1; in populate_tzc400_reg_list()[all …]
77 int dram_idx, int list_idx, in populate_tzc380_reg_list() argument84 if (list_idx == 0) { in populate_tzc380_reg_list()85 tzc380_reg_list[list_idx].secure = TZC_ATTR_SP_NS_RW; in populate_tzc380_reg_list()86 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_DISABLE; in populate_tzc380_reg_list()87 tzc380_reg_list[list_idx].addr = UL(0x0); in populate_tzc380_reg_list()88 tzc380_reg_list[list_idx].size = 0x0; in populate_tzc380_reg_list()89 tzc380_reg_list[list_idx].sub_mask = 0x0; /* all enabled */ in populate_tzc380_reg_list()90 list_idx++; in populate_tzc380_reg_list()98 tzc380_reg_list[list_idx].secure = TZC_ATTR_SP_S_RW; in populate_tzc380_reg_list()99 tzc380_reg_list[list_idx].enabled = TZC_ATTR_REGION_ENABLE; in populate_tzc380_reg_list()[all …]
41 int dram_idx, int list_idx,
49 int dram_idx, int list_idx,