| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/ |
| H A D | nrd_ras_common.c | 37 if (map->intr == intr_num) in nrd_find_ras_event_map_by_intr()
50 static void nrd_ras_intr_configure(int intr, int intr_type) in nrd_ras_intr_configure() argument
52 plat_ic_set_interrupt_type(intr, INTR_TYPE_EL3); in nrd_ras_intr_configure()
53 plat_ic_set_interrupt_priority(intr, PLAT_RAS_PRI); in nrd_ras_intr_configure()
54 plat_ic_clear_interrupt_pending(intr); in nrd_ras_intr_configure()
58 plat_ic_set_spi_routing(intr, INTR_ROUTING_MODE_ANY, in nrd_ras_intr_configure()
61 plat_ic_enable_interrupt(intr); in nrd_ras_intr_configure()
92 nrd_ras_intr_configure(map->intr, map->intr_type); in nrd_ras_platform_setup()
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| H A D | nrd_ras_sram.c | 49 uint32_t clear_status, intr; in nrd_ras_sram_intr_handler() local
53 intr = data->interrupt; in nrd_ras_sram_intr_handler()
55 INFO("NRD: Base element RAM interrupt [%d] handler\n", intr); in nrd_ras_sram_intr_handler()
59 if (intr == NRD_CSS_NS_RAM_ECC_CE_INT || in nrd_ras_sram_intr_handler()
60 intr == NRD_CSS_NS_RAM_ECC_UE_INT) { in nrd_ras_sram_intr_handler()
85 plat_ic_end_of_interrupt(intr); in nrd_ras_sram_intr_handler()
91 ras_map = nrd_find_ras_event_map_by_intr(intr); in nrd_ras_sram_intr_handler()
94 intr); in nrd_ras_sram_intr_handler()
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| H A D | nrd_ras_cpu.c | 151 uint32_t intr; in nrd_ras_cpu_intr_handler() local
155 intr = data->interrupt; in nrd_ras_cpu_intr_handler()
158 intr, plat_my_core_pos()); in nrd_ras_cpu_intr_handler()
170 plat_ic_end_of_interrupt(intr); in nrd_ras_cpu_intr_handler()
186 ras_map = nrd_find_ras_event_map_by_intr(intr); in nrd_ras_cpu_intr_handler()
189 intr); in nrd_ras_cpu_intr_handler()
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| /rk3399_ARM-atf/services/std_svc/sdei/ |
| H A D | sdei_main.c | 136 assert(map->intr == SDEI_DYN_IRQ); in sdei_class_init()
141 assert(plat_ic_is_spi(map->intr) != 0); in sdei_class_init()
161 assert(is_secure_sgi(map->intr)); in sdei_class_init()
198 assert(map->intr == SDEI_DYN_IRQ); in sdei_class_init()
206 assert(map->intr == SDEI_DYN_IRQ); in sdei_class_init()
212 assert(plat_ic_is_ppi((unsigned) map->intr) != 0); in sdei_class_init()
326 plat_ic_set_spi_routing(map->intr, routing, (u_register_t) mpidr); in sdei_event_routing_set()
409 if (plat_ic_get_interrupt_active(map->intr) != 0U) in sdei_event_register()
413 if (plat_ic_get_interrupt_type(map->intr) != INTR_TYPE_NS) in sdei_event_register()
420 plat_ic_disable_interrupt(map->intr); in sdei_event_register()
[all …]
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| H A D | sdei_intr_mgmt.c | 107 plat_ic_enable_interrupt(map->intr); in sdei_pe_unmask()
117 plat_ic_enable_interrupt(map->intr); in sdei_pe_unmask()
334 plat_ic_disable_interrupt(map->intr); in handle_masked_trigger()
335 plat_ic_set_interrupt_pending(map->intr); in handle_masked_trigger()
350 assert(plat_ic_is_spi(map->intr) != 0); in handle_masked_trigger()
351 plat_ic_set_interrupt_pending(map->intr); in handle_masked_trigger()
360 plat_sdei_handle_masked_trigger(my_mpidr, map->intr); in handle_masked_trigger()
376 uint32_t intr; in sdei_intr_handler() local
403 intr = plat_ic_get_interrupt_id(intr_raw); in sdei_intr_handler()
404 map = find_event_map_by_intr(intr, (plat_ic_is_spi(intr) != 0)); in sdei_intr_handler()
[all …]
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| H A D | sdei_private.h | 154 static inline bool is_secure_sgi(unsigned int intr) in is_secure_sgi() argument
156 return ((plat_ic_is_sgi(intr) != 0) && in is_secure_sgi()
157 (plat_ic_get_interrupt_type(intr) == INTR_TYPE_EL3)); in is_secure_sgi()
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| H A D | sdei_event.c | 116 if (map->intr == intr_num) in find_event_map_by_intr()
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| /rk3399_ARM-atf/plat/common/aarch64/ |
| H A D | plat_common.c | 52 void plat_sdei_handle_masked_trigger(uint64_t mpidr, unsigned int intr) in plat_sdei_handle_masked_trigger() argument
54 WARN("Spurious SDEI interrupt %u on masked PE %" PRIx64 "\n", intr, mpidr); in plat_sdei_handle_masked_trigger()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_bl31_setup.c | 237 int intr, intr_raw; in hikey_debug_fiq_handler() local
241 intr = plat_ic_get_interrupt_id(intr_raw); in hikey_debug_fiq_handler()
242 ERROR("Invalid interrupt: intr=%d\n", intr); in hikey_debug_fiq_handler()
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| /rk3399_ARM-atf/include/services/ |
| H A D | sdei.h | 60 .intr = (_intr), \
114 unsigned int intr; /* Physical interrupt number for a bound map */ member
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| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/ |
| H A D | nrd_ras.h | 24 int intr; /* Physical intr number */ member
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| /rk3399_ARM-atf/bl31/ |
| H A D | ehf.c | 408 unsigned int intr, pri, idx; in ehf_el3_interrupt_handler() local
426 intr = plat_ic_get_interrupt_id(intr_raw); in ehf_el3_interrupt_handler()
427 if (intr == INTR_ID_UNAVAILABLE) in ehf_el3_interrupt_handler()
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| /rk3399_ARM-atf/drivers/nxp/flexspi/nor/ |
| H A D | fspi.c | 289 uint32_t x_addr, sts0, intr, seq_id; in xspi_ip_read() local
334 intr = fspi_readl(FSPI_INTR); in xspi_ip_read()
335 if (((intr & FSPI_INTR_IPCMDGE) != 0) || in xspi_ip_read()
336 ((intr & FSPI_INTR_IPCMDERR) != 0)) { in xspi_ip_read()
337 ERROR("Error in IP READ INTR=0x%x\n", intr); in xspi_ip_read()
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| /rk3399_ARM-atf/drivers/st/usb_dwc3/ |
| H A D | usb_dwc3.c | 484 #define __HAL_PCD_ENABLE_INTR(__HANDLE__, intr) usb_dwc3_enable_eventint(__HANDLE__, intr) argument
485 #define __HAL_PCD_DISABLE_INTR(__HANDLE__, intr) usb_dwc3_disable_eventint(__HANDLE__, intr) argument
492 #define __HAL_PCD_INCR_EVENT_POS(__HANDLE__, intr, incr) \ argument
493 (__HANDLE__)->intbuffers.evtbufferpos[intr] = \
494 ((__HANDLE__)->intbuffers.evtbufferpos[intr] + \
496 #define __HAL_PCD_READ_EVENT(__HANDLE__, intr) *(volatile uint32_t *)&((__HANDLE__)->\ argument
497 intbuffers.evtbuffer_addr[intr][(__HANDLE__)->\
498 intbuffers.evtbufferpos[intr]])
508 intbuffers.evtbuffer_addr[intr][(__HANDLE__)->\
509 intbuffers.evtbufferpos[intr]])
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| /rk3399_ARM-atf/include/plat/common/ |
| H A D | platform.h | 237 void plat_sdei_handle_masked_trigger(uint64_t mpidr, unsigned int intr);
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| /rk3399_ARM-atf/docs/ |
| H A D | porting-guide.rst | 2812 Function: void plat_sdei_handle_masked_trigger(uint64_t mpidr, unsigned int intr) [optional]
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