History log of /rk3399_ARM-atf/services/std_svc/sdei/sdei_intr_mgmt.c (Results 1 – 25 of 46)
Revision Date Author Comments
# 14acc06e 13-Jun-2025 Mark Dykes <mark.dykes@arm.com>

Merge "fix(sdei): resolve coverity error for SDEI GIC" into integration


# 9dde2cc1 28-Apr-2025 Mark Dykes <mark.dykes@arm.com>

fix(sdei): resolve coverity error for SDEI GIC

Fix the following issues from Coverity check:

*** CID 463142: Memory - illegal accesses (INTEGER_OVERFLOW)
/services/std_svc/sdei/sdei_event.c: 79 i

fix(sdei): resolve coverity error for SDEI GIC

Fix the following issues from Coverity check:

*** CID 463142: Memory - illegal accesses (INTEGER_OVERFLOW)
/services/std_svc/sdei/sdei_event.c: 79 in get_event_entry_target_pe()

*** CID 463141: Memory - illegal accesses (NEGATIVE_RETURNS)
/services/std_svc/sdei/sdei_intr_mgmt.c: 64 in sdei_is_target_pe_masked()

Change-Id: I0f2928a6405f091b1ea988a43428d7032ee4c136
Signed-off-by: Mark Dykes <mark.dykes@arm.com>

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# 5776045b 23-Apr-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(sdei): return SDEI_EINVAL if signaling state is incorrect" into integration


# b142ede7 07-Oct-2024 Igor Podgainõi <igor.podgainoi@arm.com>

fix(sdei): return SDEI_EINVAL if signaling state is incorrect

In case a step is omitted when an SDEI event is registered,
enabled, unmasked and then signaled, incorrect code paths
may be reached.

T

fix(sdei): return SDEI_EINVAL if signaling state is incorrect

In case a step is omitted when an SDEI event is registered,
enabled, unmasked and then signaled, incorrect code paths
may be reached.

This patch adds additional checks to return early from such
an incorrect state.

Change-Id: Ia2753e9a1b95544e1afa72603574fe830f51ea9f
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
Signed-off-by: Mark Dykes <mark.dykes@arm.com>

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# e3ecd731 14-Mar-2024 Lauren Wehrmeister <lauren.wehrmeister@arm.com>

Merge "refactor(sdei): use common create_spsr() in SDEI library" into integration


# 03fafc0b 20-Feb-2024 Arvind Ram Prakash <arvind.ramprakash@arm.com>

refactor(sdei): use common create_spsr() in SDEI library

The current SPSR updation code as part of the SDEI interrupt handler
code is outdated. This patch replaces the legacy code with a call to
an

refactor(sdei): use common create_spsr() in SDEI library

The current SPSR updation code as part of the SDEI interrupt handler
code is outdated. This patch replaces the legacy code with a call to
an up-to-date create_spsr()

Change-Id: I1f5fdd41dd14f4b09601310fe881fa3783d7f505
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>

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# 61dfdfd4 24-Jan-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "refactor(mte): deprecate CTX_INCLUDE_MTE_REGS" into integration


# 0a33adc0 21-Dec-2023 Govindraj Raja <govindraj.raja@arm.com>

refactor(mte): deprecate CTX_INCLUDE_MTE_REGS

Currently CTX_INCLUDE_MTE_REGS is used for dual purpose,
to enable allocation tags register and to context save and restore
them and also to check if mt

refactor(mte): deprecate CTX_INCLUDE_MTE_REGS

Currently CTX_INCLUDE_MTE_REGS is used for dual purpose,
to enable allocation tags register and to context save and restore
them and also to check if mte feature is available.

To make it more meaningful, remove CTX_INCLUDE_MTE_REGS
and introduce FEAT_MTE. This would enable allocation tags register
when FEAT_MTE is enabled and also supported from platform.

Also arch features can be conditionally enabled disabled based on
arch version from `make_helpers/arch_features.mk`

Change-Id: Ibdd2d43874634ad7ddff93c7edad6044ae1631ed
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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# 82f5b509 27-Mar-2023 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "feat_state_part4" into integration

* changes:
refactor(cpufeat): enable FEAT_RNG for FEAT_STATE_CHECKED
refactor(cpufeat): align FEAT_SEL2 to new feature handling
ref

Merge changes from topic "feat_state_part4" into integration

* changes:
refactor(cpufeat): enable FEAT_RNG for FEAT_STATE_CHECKED
refactor(cpufeat): align FEAT_SEL2 to new feature handling
refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED
refactor(cpufeat): enable FEAT_TWED for FEAT_STATE_CHECKED
refactor(cpufeat): enable FEAT_CSV2_2 for FEAT_STATE_CHECKED
refactor(cpufeat): enable FEAT_ECV for FEAT_STATE_CHECKED
refactor(cpufeat): enable FEAT_PAN for FEAT_STATE_CHECKED
refactor(cpufeat): align FEAT_SB to new feature handling
refactor(cpufeat): use alternative encoding for "SB" barrier
refactor(cpufeat): enable SYS_REG_TRACE for FEAT_STATE_CHECKED
fix(cpufeat): make stub enable functions "static inline"
fix(mpam): feat_detect: support major/minor

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# 4f5ef849 26-Jan-2023 Andre Przywara <andre.przywara@arm.com>

refactor(cpufeat): enable FEAT_PAN for FEAT_STATE_CHECKED

At the moment we only support FEAT_PAN to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime det

refactor(cpufeat): enable FEAT_PAN for FEAT_STATE_CHECKED

At the moment we only support FEAT_PAN to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime detection (ENABLE_FEAT_PAN=2), by splitting
is_armv8_1_pan_present() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we PAN specific setup.

Change the FVP platform default to the now supported dynamic option (=2),
so the right decision can be made by the code at runtime.

Change-Id: I58e5fe8d3c9332820391c7d93a8fb9dba4cf754a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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# 7419b7a7 20-Mar-2023 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "feat_state_part3" into integration

* changes:
refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
feat(l

Merge changes from topic "feat_state_part3" into integration

* changes:
refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
feat(libc): add support for fallthrough statement
refactor(spe): enable FEAT_SPE for FEAT_STATE_CHECKED
refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS
fix(spe): drop SPE EL2 context switch code

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# ea735bf5 17-Nov-2022 Andre Przywara <andre.przywara@arm.com>

refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED

At the moment we only support FEAT_VHE to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime det

refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED

At the moment we only support FEAT_VHE to be either unconditionally
compiled in, or to be not supported at all.

Add support for runtime detection (ENABLE_FEAT_VHE=2), by splitting
is_armv8_1_vhe_present() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we access VHE related registers.
Also move the context saving code from assembly to C, and use the new
is_feat_vhe_supported() function to guard its execution.

Enable VHE in its runtime detection version for all FVP builds.

Change-Id: Ib397cd0c83e8c709bd6fed603560e39901fa672b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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# 28623c10 08-Nov-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "fix: libc: use long for 64-bit types on aarch64" into integration


# 4ce3e99a 25-Aug-2020 Scott Branden <scott.branden@broadcom.com>

fix: libc: use long for 64-bit types on aarch64

Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width type

fix: libc: use long for 64-bit types on aarch64

Use long instead of long long on aarch64 for 64_t stdint types.
Introduce inttypes.h to properly support printf format specifiers for
fixed width types for such change.

Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1
Signed-off-by: Scott Branden <scott.branden@broadcom.com>

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# 387ff949 22-Oct-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(sdei): print event number in hex format" into integration


# 6b94356b 01-Sep-2021 Vasyl Gomonovych <vgomonovych@marvell.com>

fix(sdei): print event number in hex format

SDEI specified event numbers in hexadecimal format.
Change event number format to hexadecimal to make
it easier for the reader to recognize the proper eve

fix(sdei): print event number in hex format

SDEI specified event numbers in hexadecimal format.
Change event number format to hexadecimal to make
it easier for the reader to recognize the proper event.

Change-Id: Iac7a91d0910316e0ad54a8f09bc17209e8c6adf6
Signed-off-by: Vasyl Gomonovych <vgomonovych@marvell.com>

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# 20ceff34 28-Jul-2021 Joanna Farley <joanna.farley@arm.com>

Merge "services: Fix pmr_el1 rewrote issue in sdei_disaptch_event()" into integration


# d21f1ddb 23-Apr-2021 Ming Huang <huangming@linux.alibaba.com>

services: Fix pmr_el1 rewrote issue in sdei_disaptch_event()

Consider a RAS scenario:
Enter EL3 by sync exception, then call spm_mm_sp_call() enter
EL0s to handle this error, then call sdei_dispatch

services: Fix pmr_el1 rewrote issue in sdei_disaptch_event()

Consider a RAS scenario:
Enter EL3 by sync exception, then call spm_mm_sp_call() enter
EL0s to handle this error, then call sdei_dispatch_event() to
inform OS. Finally, return back to OS from sync exception flow.
Similar flow is sgi_ras_intr_handler() in sgi_ras.c.

The icc_pmr_el1 register will be change in above flow:
1 cm_el1_sysregs_context_save(NON_SECURE);
-> ehf_exited_normal_world();
##icc_pmr_el1: 0xf8 => 0x80
2 spm_mm_sp_call();
3 sdei_dispatch_event();
4 ehf_activate_priority(sdei_event_priority(map));
##icc_pmr_el1: 0x80 => 0x60
5 restore_and_resume_ns_context();
-> ehf_exited_normal_world();
##return due to has_valid_pri_activations(pe_data) == 1
6 ehf_deactivate_priority(sdei_event_priority(map));
##icc_pmr_el1: 0x60 => 0x80
The icc_pmr_el1 was rewrote from 0xf8 to 0x80. This issue will
result in OS hang when eret to OS from RAS flow.

Move ehf_activate_priority(sdei_event_priority(map)) after
restore_and_resume_ns_context() can fix this issue.

Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Change-Id: If01ec55cf0aabf1594dece1ad50d3ec3406cdabc

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# f98c0bea 26-Jul-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(sdei): set SPSR for SDEI based on TakeException" into integration


# 37596fcb 25-Nov-2020 Daniel Boulby <danielboulby@arm.com>

fix(sdei): set SPSR for SDEI based on TakeException

The SDEI specification now says that during an SDEI
event handler dispatch the SPSR should be set according
to the TakeException() pseudocode func

fix(sdei): set SPSR for SDEI based on TakeException

The SDEI specification now says that during an SDEI
event handler dispatch the SPSR should be set according
to the TakeException() pseudocode function defined in
the Arm Architecture Reference Manual. This patch sets
the SPSR according to the function given in
ARM DDI 0487F.c page J1-7635

Change-Id: Id2f8f2464fd69c701d81626162827e5c4449b658
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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# 873e394b 11-Feb-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1810 from antonio-nino-diaz-arm/an/setjmp

Make setjmp/longjmp compliant with the C standard and move them to libc


# e0566305 08-Feb-2019 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Make setjmp.h prototypes comply with the C standard

Instead of having a custom implementation of setjmp() and longjmp() it
is better to follow the C standard.

The comments in setjmp.h are no longer

Make setjmp.h prototypes comply with the C standard

Instead of having a custom implementation of setjmp() and longjmp() it
is better to follow the C standard.

The comments in setjmp.h are no longer needed as there are no deviations
from the expected one, so they have been removed.

All SDEI code that relied on them has been fixed to use the new function
prototypes and structs.

Change-Id: I6cd2e21cb5a5bcf81ba12283f2e4c067bd5172ca
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 9a207532 04-Jan-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase


# 09d40e0e 14-Dec-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 9345d9a0 28-Nov-2018 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1693 from jeenu-arm/ehf-doc

EHF and RAS documentation


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