Searched refs:bakery (Results 1 – 7 of 7) sorted by relevance
44 static unsigned int bakery_get_ticket(bakery_lock_t *bakery, unsigned int me) in bakery_get_ticket() argument50 assert(bakery_ticket_number(bakery->lock_data[me]) == 0U); in bakery_get_ticket()63 bakery->lock_data[me] = make_bakery_data(CHOOSING_TICKET, my_ticket); in bakery_get_ticket()65 their_ticket = bakery_ticket_number(bakery->lock_data[they]); in bakery_get_ticket()76 bakery->lock_data[me] = make_bakery_data(CHOSEN_TICKET, my_ticket); in bakery_get_ticket()93 void bakery_lock_get(bakery_lock_t *bakery) in bakery_lock_get() argument101 assert_bakery_entry_valid(me, bakery); in bakery_lock_get()104 my_ticket = bakery_get_ticket(bakery, me); in bakery_lock_get()118 their_bakery_data = bakery->lock_data[they]; in bakery_lock_get()137 bakery_ticket_number(bakery->lock_data[they])); in bakery_lock_get()[all …]
95 static inline void bakery_lock_init(bakery_lock_t *bakery) {} in bakery_lock_init() argument96 void bakery_lock_get(bakery_lock_t *bakery);97 void bakery_lock_release(bakery_lock_t *bakery);
26 PSCI_LIB_SOURCES += lib/locks/bakery/bakery_lock_coherent.c28 PSCI_LIB_SOURCES += lib/locks/bakery/bakery_lock_normal.c
178 * The compiler will allocate enough memory for one CPU's bakery locks,193 /* padded memory section to store per cpu bakery locks */197 /* PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements */
2286 The bakery lock data structure ``bakery_lock_t`` is allocated in coherent memory2296 * choosing its bakery number.2297 * Bits[1 - 15] : number. This is the bakery number allocated.2321 To use bakery locks when ``USE_COHERENT_MEM`` is disabled, the lock data structure2324 for a single CPU. The macro ``DEFINE_BAKERY_LOCK`` allocates all the bakery locks2331 The bakery lock data structure ``bakery_info_t`` is defined for use when2340 * choosing its bakery number.2341 * Bits[1 - 15] : number. This is the bakery number allocated.2348 system represents the complete bakery lock. The view in memory for a system2349 with n bakery locks are:[all …]
2744 accommodate all the bakery locks.2751 accessing per-cpu bakery lock information.
10656 - locks: bakery: Use is_dcache_enabled() helper and add a DMB to the10917 - locks: T589: Fix insufficient ordering guarantees in bakery lock11561 - Optimized bakery locks when hardware-assisted coherency is enabled using the12191 - Use spin-locks instead of bakery locks.12681 - The bakery lock structure for coherent memory has been optimised.12949 - Removed calling CPU mpidr from the bakery lock API, saving 160 bytes.