Lines Matching refs:bakery

2286 The bakery lock data structure ``bakery_lock_t`` is allocated in coherent memory
2296          *                choosing its bakery number.
2297          * Bits[1 - 15] : number. This is the bakery number allocated.
2321 To use bakery locks when ``USE_COHERENT_MEM`` is disabled, the lock data structure
2324 for a single CPU. The macro ``DEFINE_BAKERY_LOCK`` allocates all the bakery locks
2331 The bakery lock data structure ``bakery_info_t`` is defined for use when
2340          *                choosing its bakery number.
2341          * Bits[1 - 15] : number. This is the bakery number allocated.
2348 system represents the complete bakery lock. The view in memory for a system
2349 with n bakery locks are:
2388 Consider a system of 2 CPUs with 'N' bakery locks as shown above. For an
2393 On Arm Platforms, bakery locks are used in psci (``psci_locks``) and power controller
2404 There is however a performance impact for bakery locks, due to:
2407 -  Multiple cache line reads for each lock operation, since the bakery locks
2411 Measurements indicate that when bakery locks are allocated in Normal memory, the
2419 ``USE_COHERENT_MEM`` and needs to use bakery locks in the porting layer, it can