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Searched refs:apupwr_smc_pll_set_rate (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/apusys/
H A Dapupwr_clkctl.c81 apupwr_smc_pll_set_rate(BUCK_VCONN_DOMAIN_DEFAULT_FREQ, in apupwr_smc_acc_init_all()
84 apupwr_smc_pll_set_rate(BUCK_VCONN_DOMAIN_DEFAULT_FREQ, in apupwr_smc_acc_init_all()
87 apupwr_smc_pll_set_rate(BUCK_VVPU_DOMAIN_DEFAULT_FREQ, in apupwr_smc_acc_init_all()
90 apupwr_smc_pll_set_rate(BUCK_VMDLA_DOMAIN_DEFAULT_FREQ, in apupwr_smc_acc_init_all()
200 int32_t apupwr_smc_pll_set_rate(uint32_t freq, bool div2, uint32_t domain) in apupwr_smc_pll_set_rate() function
H A Dapupwr_clkctl.h16 int32_t apupwr_smc_pll_set_rate(uint32_t pll, bool div2, uint32_t domain);