Searched refs:_reg_PHY_PLL_CTRL (Results 1 – 2 of 2) sorted by relevance
1148 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), in regif_pll_wa()1150 _reg_PHY_PLL_CTRL)); in regif_pll_wa()1162 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), in regif_pll_wa()1167 _reg_PHY_PLL_CTRL)); in regif_pll_wa()1411 ddrtbl_setval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_PLL_CTRL, in ddrtbl_load()2866 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x01421142U); in pll3_freq()2869 reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x03421342U); in pll3_freq()
368 #define _reg_PHY_PLL_CTRL 0x00000168U macro