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Searched refs:_idx (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32-core.h256 int _idx, unsigned long prate);
258 #define FIXED_FACTOR(idx, _idx, _parent, _mult, _div) \ argument
260 .binding = (_idx),\
295 #define CK_TIMER(idx, _idx, _parent, _flags, _apbdiv, _timpre) \ argument
297 .binding = (_idx),\
361 #define CLK_OSC(idx, _idx, _parent, _osc_id) \ argument
363 .binding = (_idx),\
372 #define CLK_OSC_FIXED(idx, _idx, _parent, _osc_id) \ argument
374 .binding = (_idx),\
H A Dclk-stm32mp2.c711 #define CLK_PLL_CFG(_idx, _clk_id, _reg)\ argument
712 [(_idx)] = {\
914 #define CLK_PLL(idx, _idx, _parent, _pll_id, _flags)[idx] = {\ argument
915 .binding = _idx,\
962 #define CLK_PLL1(idx, _idx, _parent, _pll_id, _flags)[idx] = {\ argument
963 .binding = _idx,\
1072 #define FLEXGEN(idx, _idx, _flags, _id)[idx] = {\ argument
1073 .binding = _idx,\
1140 #define CLK_OSC_MSI(idx, _idx, _parent, _osc_id) \ argument
1142 .binding = (_idx),\
H A Dclk-stm32mp13.c1186 #define CLK_PLL_CFG(_idx, _clk_id, _type, _reg)\ argument
1187 [(_idx)] = {\
1676 #define CLK_PLL_CFG(_idx, _clk_id, _type, _reg)\ argument
1677 [(_idx)] = {\
1771 #define CLK_PLL(idx, _idx, _parent, _gate, _pll_id, _flags)[idx] = {\ argument
1772 .binding = _idx,\