| /rk3399_ARM-atf/include/lib/pmf/ |
| H A D | pmf_helpers.h | 58 #define PMF_CAPTURE_TIMESTAMP(_name, _tid, _flags) \ argument
61 if (((_flags) & PMF_CACHE_MAINT) != 0U) \
67 #define PMF_CAPTURE_AND_GET_TIMESTAMP(_name, _tid, _flags, _tsval) \ argument
71 if (((_flags) & PMF_CACHE_MAINT) != 0U) \
77 #define PMF_WRITE_TIMESTAMP(_name, _tid, _flags, _wrval) \ argument
80 if (((_flags) & PMF_CACHE_MAINT) != 0U) \
99 #define PMF_GET_TIMESTAMP_BY_MPIDR(_name, _tid, _mpidr, _flags, _tsval)\ argument
100 _tsval = pmf_get_timestamp_by_mpidr_ ## _name(_tid, _mpidr, _flags)
102 #define PMF_GET_TIMESTAMP_BY_INDEX(_name, _tid, _cpuid, _flags, _tsval)\ argument
103 _tsval = pmf_get_timestamp_by_index_ ## _name(_tid, _cpuid, _flags)
[all …]
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| /rk3399_ARM-atf/include/services/ |
| H A D | sdei.h | 57 #define SDEI_EVENT_MAP(_event, _intr, _flags) \ argument
61 .map_flags = (_flags) \
64 #define SDEI_SHARED_EVENT(_event, _intr, _flags) \ argument
65 SDEI_EVENT_MAP(_event, _intr, _flags)
67 #define SDEI_PRIVATE_EVENT(_event, _intr, _flags) \ argument
68 SDEI_EVENT_MAP(_event, _intr, (_flags) | SDEI_MAPF_PRIVATE)
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | clk-stm32-core.h | 216 #define STM32_DIV(idx, _binding, _parent, _flags, _div_id) \ argument
220 .flags = (_flags),\
231 #define STM32_GATE(idx, _binding, _parent, _flags, _gate_id) \ argument
235 .flags = (_flags),\
261 #define GATE(idx, _binding, _parent, _flags, _offset, _bit_idx) \ argument
265 .flags = (_flags),\
273 #define STM32_MUX(idx, _binding, _mux_id, _flags) \ argument
277 .flags = (_flags),\
287 #define CK_TIMER(idx, _idx, _parent, _flags, _apbdiv, _timpre) \ argument
291 .flags = (CLK_SET_RATE_PARENT | (_flags)),\
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| H A D | clk-stm32mp2.c | 615 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument
619 .flags = _flags,\
1154 #define CLK_PLL(idx, _idx, _parent, _pll_id, _flags)[idx] = {\ argument
1157 .flags = (_flags),\
1202 #define CLK_PLL1(idx, _idx, _parent, _pll_id, _flags)[idx] = {\ argument
1205 .flags = (_flags),\
1312 #define FLEXGEN(idx, _idx, _flags, _id)[idx] = {\ argument
1315 .flags = (_flags),\
1419 #define CLK_RTC(idx, _binding, _parent, _flags, _gate_id)[idx] = {\ argument
1422 .flags = (_flags),\
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| H A D | clk-stm32mp13.c | 777 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table, _bitrdy)[id] = {\ argument
781 .flags = _flags,\
2026 #define CLK_PLL(idx, _idx, _parent, _gate, _pll_id, _flags)[idx] = {\ argument
2029 .flags = (_flags),\
2081 #define STM32_COMPOSITE(idx, _binding, _parent, _flags, _gate_id,\ argument
2085 .flags = (_flags),\
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| /rk3399_ARM-atf/drivers/brcm/ |
| H A D | spi_flash.c | 21 #define FINFO(jedec_id, ext_id, _sector_size, _n_sectors, _page_size, _flags) \ argument
33 .flags = (_flags),
|