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Searched refs:_CK_PLL1 (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp13.c101 _CK_PLL1, enumerator
1456 pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcr, mmio_read_32(pll_base)); in _clk_stm32_pll_wait_ready_on()
1474 pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcr, mmio_read_32(pll_base)); in _clk_stm32_pll_wait_ready_off()
1684 CLK_PLL_CFG(_PLL1, _CK_PLL1, PLL_2000, RCC_PLL1CR),
1879 CLK_PLL(_CK_PLL1, PLL1, MUX(MUX_PLL12), GATE_PLL1, _PLL1, 0),
1884 STM32_COMPOSITE(_PLL1P, PLL1_P, _CK_PLL1, CLK_IS_CRITICAL, GATE_PLL1_DIVP, DIV_PLL1DIVP),
1885 STM32_DIV(_PLL1P_DIV, _NO_ID, _CK_PLL1, 0, DIV_MPU),
H A Dclk-stm32mp2.c108 _CK_PLL1, enumerator
718 CLK_PLL_CFG(_PLL1, _CK_PLL1, A35_SS_CHGCLKREQ),
802 pll->clk_id - _CK_PLL1 + 1, pll->reg_pllxcfgr1, in _clk_stm32_pll_wait_ready_on()
821 pll->clk_id - _CK_PLL1 + 1, pllxcfgr1, mmio_read_32(pllxcfgr1)); in _clk_stm32_pll_wait_ready_off()
1213 CLK_PLL1(_CK_PLL1, PLL1_CK, MUX(MUX_MUXSEL5), _PLL1, 0),
1782 EARLY_ERROR("PLL%d ref clock not started\n", pll->clk_id - _CK_PLL1 + 1); in clk_stm32_pll_wait_mux_ready()