Home
last modified time | relevance | path

Searched refs:VPPSYS0_SW_CG1 (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_cond.c39 #define VPPSYS0_SW_CG1 MT_LP_TZ_VPPSYS0_REG(0x002C) macro
98 IDLE_CG(0x00000800, VPPSYS0_SW_CG1, true, (CLK_CHECK|CLKMUX_DISP)),
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_cond.c42 #define VPPSYS0_SW_CG1 MT_LP_TZ_VPPSYS0_REG(0x002C) macro
104 IDLE_CG(0x00000800, VPPSYS0_SW_CG1, true, (CLK_CHECK | CLKMUX_VPP)),