Home
last modified time | relevance | path

Searched refs:SPM_DVFS_LEVEL (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_vcorefs.c289 mmio_write_32(SPM_DVFS_LEVEL, 0x00000001); in spm_dvfsfw_init()
H A Dmt_spm_reg.h266 #define SPM_DVFS_LEVEL (SPM_BASE + 0x4A4) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.c374 mmio_write_32(SPM_DVFS_LEVEL, 0x00000001); in spm_dvfsfw_init()
H A Dmt_spm_reg.h274 #define SPM_DVFS_LEVEL (SPM_BASE + 0x498) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.c413 mmio_write_32(SPM_DVFS_LEVEL, 0x00000001); in spm_dvfsfw_init()
H A Dmt_spm_reg.h254 #define SPM_DVFS_LEVEL (SPM_BASE + 0x4A4) macro
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dspm_reg.h257 #define SPM_DVFS_LEVEL (SPM_BASE + 0x498) macro
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm.h311 #define SPM_DVFS_LEVEL (SPM_BASE + 0x6A4) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_reg.h137 #define SPM_DVFS_LEVEL (SPM_BASE + 0x03A0) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_reg.h136 #define SPM_DVFS_LEVEL (SPM_BASE + 0x3A0) macro