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Searched refs:SEC_DRAM_BASE (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/qemu/qemu/include/
H A Dplatform_def.h89 #define SEC_DRAM_BASE 0x0e100000 macro
98 #define QEMU_OPTEE_PAGEABLE_LOAD_BASE (SEC_DRAM_BASE + 0x00200000)
167 #define BL32_DRAM_BASE SEC_DRAM_BASE
168 #define BL32_DRAM_LIMIT (SEC_DRAM_BASE + SEC_DRAM_SIZE - \
180 # define BL32_MEM_BASE SEC_DRAM_BASE
342 #define PLAT_QEMU_L1_GPT_BASE (SEC_DRAM_BASE + SEC_DRAM_SIZE - \
H A Dqemu_pas_def.h59 #define QEMU_PAS_SEC_BASE SEC_DRAM_BASE
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/
H A Dplatform_def.h93 #define SEC_DRAM_BASE 0x1000 macro
97 #define QEMU_OPTEE_PAGEABLE_LOAD_BASE (SEC_DRAM_BASE + 0x00200000)