Searched refs:S32CC_CLK_MC_CGM0_MUX8 (Results 1 – 3 of 3) sorted by relevance
94 #define S32CC_CLK_MC_CGM0_MUX8 S32CC_ARCH_CLK(15) macro
137 ret = clk_set_parent(S32CC_CLK_MC_CGM0_MUX8, S32CC_CLK_PERIPH_PLL_PHI3); in enable_uart_clk()
233 [S32CC_CLK_ID(S32CC_CLK_MC_CGM0_MUX8)] = &cgm0_mux8_clk,