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Searched refs:RK3568_PLLCON (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/scmi/
H A Drk3568_clk.c307 mmio_write_32(CRU_BASE + RK3568_PLLCON(0), in rk3568_apll_set_rate()
311 mmio_write_32(CRU_BASE + RK3568_PLLCON(0), in rk3568_apll_set_rate()
315 mmio_write_32(CRU_BASE + RK3568_PLLCON(1), in rk3568_apll_set_rate()
319 mmio_write_32(CRU_BASE + RK3568_PLLCON(1), in rk3568_apll_set_rate()
323 mmio_write_32(CRU_BASE + RK3568_PLLCON(1), in rk3568_apll_set_rate()
330 if (mmio_read_32(CRU_BASE + RK3568_PLLCON(1)) & in rk3568_apll_set_rate()
359 fbdiv = (mmio_read_32(CRU_BASE + RK3568_PLLCON(0)) >> in rk3568_apll_get_rate()
362 postdiv1 = (mmio_read_32(CRU_BASE + RK3568_PLLCON(0)) >> in rk3568_apll_get_rate()
365 refdiv = (mmio_read_32(CRU_BASE + RK3568_PLLCON(1)) >> in rk3568_apll_get_rate()
368 postdiv2 = (mmio_read_32(CRU_BASE + RK3568_PLLCON(1)) >> in rk3568_apll_get_rate()
H A Drk3568_clk.h43 #define RK3568_PLLCON(i) (i * 0x4) macro