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Searched refs:RCC_XBAR0CFGR (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c343 MUX_CONF(MUX_XBARSEL, xbarsel_src, RCC_XBAR0CFGR, 0, 4),
1022 address = RCC_XBAR0CFGR + (cfg->id * 4); in clk_flexgen_get_parent()
1553 uintptr_t xbar0cfgr = priv->base + RCC_XBAR0CFGR; in stm32mp2_clk_xbar_on_hsi()
1924 uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4U * channel); in wait_xbar_sts()
1973 mmio_clrsetbits_32(rcc_base + RCC_XBAR0CFGR + (0x4U * channel), in flexclkgen_config_channel()
1976 mmio_setbits_32(rcc_base + RCC_XBAR0CFGR + (0x4U * channel), in flexclkgen_config_channel()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp21_rcc.h428 #define RCC_XBAR0CFGR U(0x1018) macro
H A Dstm32mp25_rcc.h473 #define RCC_XBAR0CFGR U(0x1018) macro