Searched refs:RCC_PLLxCFGR7_POSTDIV2_MASK (Results 1 – 3 of 3) sorted by relevance
892 postdiv2 = mmio_read_32(pllxcfgr7) & RCC_PLLxCFGR7_POSTDIV2_MASK; in clk_stm32_pll_recalc_rate()1681 mmio_clrsetbits_32(pllxcfgr7, RCC_PLLxCFGR7_POSTDIV2_MASK, in clk_stm32_pll_config_output()1682 pllcfg[POSTDIV2] & RCC_PLLxCFGR7_POSTDIV2_MASK); in clk_stm32_pll_config_output()
2856 #define RCC_PLLxCFGR7_POSTDIV2_MASK GENMASK_32(2, 0) macro4659 #define RCC_PLLxCFGR7_POSTDIV2_MASK GENMASK_32(2, 0) macro
3052 #define RCC_PLLxCFGR7_POSTDIV2_MASK GENMASK_32(2, 0) macro4979 #define RCC_PLLxCFGR7_POSTDIV2_MASK GENMASK_32(2, 0) macro