Searched refs:RCC_PLLxCFGR1_PLLEN (Results 1 – 3 of 3) sorted by relevance
774 return ((mmio_read_32(pllxcfgr1) & RCC_PLLxCFGR1_PLLEN) != 0U); in _clk_stm32_pll_is_enabled()781 mmio_setbits_32(pllxcfgr1, RCC_PLLxCFGR1_PLLEN); in _clk_stm32_pll_set_on()789 mmio_clrbits_32(pllxcfgr1, RCC_PLLxCFGR1_PLLEN); in _clk_stm32_pll_set_off()1720 mmio_clrbits_32(pllxcfgr1, RCC_PLLxCFGR1_PLLEN); in clk_stm32_pll_config_csg()
2823 #define RCC_PLLxCFGR1_PLLEN BIT(8) macro4626 #define RCC_PLLxCFGR1_PLLEN BIT(8) macro
3019 #define RCC_PLLxCFGR1_PLLEN BIT(8) macro4946 #define RCC_PLLxCFGR1_PLLEN BIT(8) macro