Searched refs:RCC_PLLNCR_DIVQEN (Results 1 – 4 of 4) sorted by relevance
1431 mmio_clrsetbits_32(pll_base, RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN, in _clk_stm32_pll_set_on()1440 mmio_clrbits_32(pll_base, RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN); in _clk_stm32_pll_set_off()1526 RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN); in _clk_stm32_pll_init()1543 mmio_setbits_32(pll_base, RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN); in _clk_stm32_pll_init()2208 vco->status = RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | RCC_PLLNCR_DIVREN | RCC_PLLNCR_PLLON; in clk_stm32_load_vco_config()
1802 RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | in stm32mp1_pll_start()1835 mmio_clrbits_32(pllxcr, RCC_PLLNCR_DIVPEN | RCC_PLLNCR_DIVQEN | in stm32mp1_pll_stop()
1757 #define RCC_PLLNCR_DIVQEN BIT(5) macro
2283 #define RCC_PLLNCR_DIVQEN BIT(5) macro