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Searched refs:RCC_PLLNCFGR2_DIVP_SHIFT (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dstm32mp1_clk.c806 [_DIV_P] = RCC_PLLNCFGR2_DIVP_SHIFT,
1782 value = (pllcfg[PLLCFG_P] << RCC_PLLNCFGR2_DIVP_SHIFT) & in stm32mp1_check_pll_conf()
1861 value = (pllcfg[PLLCFG_P] << RCC_PLLNCFGR2_DIVP_SHIFT) & in stm32mp1_pll_config_output()
H A Dclk-stm32mp13.c1227 value |= (out->output[PLL_CFG_P] << RCC_PLLNCFGR2_DIVP_SHIFT) & RCC_PLLNCFGR2_DIVP_MASK; in clk_stm32_pll_compute_cfgr2()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp13_rcc.h1773 #define RCC_PLLNCFGR2_DIVP_SHIFT 0 macro
H A Dstm32mp15_rcc.h2300 #define RCC_PLLNCFGR2_DIVP_SHIFT 0 macro