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Searched refs:RCC_DDRCAPBCFGR (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp2_ddr.c221 mmio_write_32(priv->rcc + RCC_DDRCAPBCFGR, in ddr_reset()
232 mmio_write_32(priv->rcc + RCC_DDRCAPBCFGR, in ddr_reset()
249 mmio_write_32(priv->rcc + RCC_DDRCAPBCFGR, in ddr_standby_reset()
399 mmio_clrbits_32(priv->rcc + RCC_DDRCAPBCFGR, RCC_DDRCAPBCFGR_DDRCAPBRST); in stm32mp2_ddr_init()
H A Dstm32mp2_ddr_helpers.c513 mmio_write_32(rcc_base + RCC_DDRCAPBCFGR, RCC_DDRCAPBCFGR_DDRCAPBRST); in ddr_sub_system_clk_off()
/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c565 GATE_CFG(GATE_DDRCAPB, RCC_DDRCAPBCFGR, 1, 0),
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp21_rcc.h302 #define RCC_DDRCAPBCFGR U(0x4D8) macro
H A Dstm32mp25_rcc.h306 #define RCC_DDRCAPBCFGR U(0x4D8) macro