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Searched refs:PMU_PWRMODE_CON (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3288/drivers/pmu/
H A Dpmu.c120 mmio_write_32(PMU_BASE + PMU_PWRMODE_CON, mode_set); in pmu_set_sleep_mode()
233 mmio_write_32(PMU_BASE + PMU_PWRMODE_CON, store_pmu_pwrmode_con); in rockchip_soc_sys_pwr_dm_resume()
258 store_pmu_pwrmode_con = mmio_read_32(PMU_BASE + PMU_PWRMODE_CON); in rockchip_soc_sys_pwr_dm_suspend()
H A Dpmu.h22 #define PMU_PWRMODE_CON 0x18 macro
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/src/
H A Dsuspend.c27 mmio_clrbits_32(PMU_BASE + PMU_PWRMODE_CON, 0x01); in m0_main()
/rk3399_ARM-atf/plat/rockchip/rk3399/include/shared/
H A Dpmu_regs.h18 #define PMU_PWRMODE_CON 0x20 macro
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/
H A Dsuspend.c598 mmio_setbits_32(PMU_BASE + PMU_PWRMODE_CON, (1 << 19)); in pctl_start()
600 mmio_setbits_32(PMU_BASE + PMU_PWRMODE_CON, (1 << 23)); in pctl_start()
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dpmu.c888 mmio_write_32(PMU_BASE + PMU_PWRMODE_CON, slp_mode_cfg); in sys_slp_config()