Home
last modified time | relevance | path

Searched refs:MVEBU_PM_NB_CPU_PWR_CTRL_REG (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Dplat_pm.c80 #define MVEBU_PM_NB_CPU_PWR_CTRL_REG (MVEBU_PMSU_REG_BASE + 0x4) macro
304 mmio_setbits_32(MVEBU_PM_NB_CPU_PWR_CTRL_REG, MVEBU_PM_L2_FLUSH_EN); in a3700_set_gen_pwr_off_option()