Searched refs:MVEBU_PM_CPU_0_PWR_CTRL_REG (Results 1 – 1 of 1) sorted by relevance
122 #define MVEBU_PM_CPU_0_PWR_CTRL_REG (MVEBU_PMSU_REG_BASE + 0x34) macro349 mmio_setbits_32(MVEBU_PM_CPU_0_PWR_CTRL_REG, MVEBU_PM_CORE_PD); in a3700_set_gen_pwr_off_option()355 mmio_setbits_32(MVEBU_PM_CPU_0_PWR_CTRL_REG, MVEBU_PM_CORE_SOC_PD); in a3700_set_gen_pwr_off_option()359 mmio_setbits_32(MVEBU_PM_CPU_0_PWR_CTRL_REG, MVEBU_PM_CORE_PROC_PD); in a3700_set_gen_pwr_off_option()