Searched refs:GPLL_RATE (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/scmi/ |
| H A D | rk3588_clk.c | 57 #define GPLL_RATE 1188000000 macro
351 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpul_set_rate()
445 return GPLL_RATE / (div + 1); in clk_scmi_cpul_get_rate()
521 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub01_set_rate()
615 return GPLL_RATE / (div + 1); in clk_scmi_cpub01_get_rate()
691 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub23_set_rate()
785 return GPLL_RATE / (div + 1); in clk_scmi_cpub23_get_rate()
820 return GPLL_RATE / (div + 1); in clk_scmi_dsu_get_rate()
889 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_dsu_set_rate()
940 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
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| /rk3399_ARM-atf/plat/rockchip/rk3576/scmi/ |
| H A D | rk3576_clk.c | 53 #define GPLL_RATE 1188000000 macro
458 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpul_set_rate()
549 return GPLL_RATE / (div + 1); in clk_scmi_cpul_get_rate()
622 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub_set_rate()
719 return GPLL_RATE / (div + 1); in clk_scmi_cpub_get_rate()
749 return GPLL_RATE / (div + 1); in clk_scmi_cci_get_rate()
835 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
881 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_gpu_set_rate()
937 return GPLL_RATE / (div_src + 1) / (div + 1); in clk_scmi_npu_get_rate()
983 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_npu_set_rate()
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| /rk3399_ARM-atf/plat/rockchip/rk3568/drivers/scmi/ |
| H A D | rk3568_clk.c | 29 #define GPLL_RATE 1188000000 macro
481 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
514 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_gpu_set_rate()
546 return GPLL_RATE / (div + 1); in clk_scmi_npu_get_rate()
580 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_npu_set_rate()
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