Home
last modified time | relevance | path

Searched refs:GPLL_RATE (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/scmi/
H A Drk3588_clk.c52 #define GPLL_RATE 1188000000 macro
346 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpul_set_rate()
439 return GPLL_RATE / (div + 1); in clk_scmi_cpul_get_rate()
515 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub01_set_rate()
608 return GPLL_RATE / (div + 1); in clk_scmi_cpub01_get_rate()
684 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub23_set_rate()
777 return GPLL_RATE / (div + 1); in clk_scmi_cpub23_get_rate()
811 return GPLL_RATE / (div + 1); in clk_scmi_dsu_get_rate()
880 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_dsu_set_rate()
930 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3576/scmi/
H A Drk3576_clk.c53 #define GPLL_RATE 1188000000 macro
458 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpul_set_rate()
549 return GPLL_RATE / (div + 1); in clk_scmi_cpul_get_rate()
622 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub_set_rate()
719 return GPLL_RATE / (div + 1); in clk_scmi_cpub_get_rate()
749 return GPLL_RATE / (div + 1); in clk_scmi_cci_get_rate()
835 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
881 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_gpu_set_rate()
937 return GPLL_RATE / (div_src + 1) / (div + 1); in clk_scmi_npu_get_rate()
983 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_npu_set_rate()
/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/scmi/
H A Drk3568_clk.c29 #define GPLL_RATE 1188000000 macro
481 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
514 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_gpu_set_rate()
546 return GPLL_RATE / (div + 1); in clk_scmi_npu_get_rate()
580 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_npu_set_rate()