Lines Matching refs:GPLL_RATE
52 #define GPLL_RATE 1188000000 macro
346 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpul_set_rate()
439 return GPLL_RATE / (div + 1); in clk_scmi_cpul_get_rate()
515 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub01_set_rate()
608 return GPLL_RATE / (div + 1); in clk_scmi_cpub01_get_rate()
684 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_cpub23_set_rate()
777 return GPLL_RATE / (div + 1); in clk_scmi_cpub23_get_rate()
811 return GPLL_RATE / (div + 1); in clk_scmi_dsu_get_rate()
880 div = DIV_ROUND_UP(GPLL_RATE, rate) - 1; in clk_dsu_set_rate()
930 return GPLL_RATE / (div + 1); in clk_scmi_gpu_get_rate()
981 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_gpu_set_rate()
1029 return GPLL_RATE / (div + 1); in clk_scmi_npu_get_rate()
1080 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_npu_set_rate()
1186 return GPLL_RATE / (div + 1); in clk_scmi_cclk_sdmmc_get_rate()
1205 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_scmi_cclk_sdmmc_set_rate()
1231 return GPLL_RATE / (div + 1); in clk_scmi_dclk_sdmmc_get_rate()
1245 div = DIV_ROUND_UP(GPLL_RATE, rate); in clk_scmi_dclk_sdmmc_set_rate()