Searched refs:GICD_CTLR_RWP_BIT (Results 1 – 4 of 4) sorted by relevance
72 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in set_gicd_dchipr_rt_owner()108 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in set_gicd_chipr_n()378 CTLR_ENABLE_G1NS_BIT | GICD_CTLR_RWP_BIT)) != 0) { in gic600_multichip_init()
266 while ((gicd_read_ctlr(gicd_base) & GICD_CTLR_RWP_BIT) != 0U) { in gicd_wait_for_pending_write()
56 if ((a3700_gicd_read(GICD_CTLR) & GICD_CTLR_RWP_BIT) != 0U) { in a3700_gicd_ctlr_clear_bits()
138 #define GICD_CTLR_RWP_BIT BIT_32(GICD_CTLR_RWP_SHIFT) macro