Home
last modified time | relevance | path

Searched refs:GICD_CTLR (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Dcm3_system_reset.c51 val = a3700_gicd_read(GICD_CTLR); in a3700_gicd_ctlr_clear_bits()
53 a3700_gicd_write(GICD_CTLR, val & ~bits); in a3700_gicd_ctlr_clear_bits()
56 if ((a3700_gicd_read(GICD_CTLR) & GICD_CTLR_RWP_BIT) != 0U) { in a3700_gicd_ctlr_clear_bits()
/rk3399_ARM-atf/drivers/arm/gic/common/
H A Dgic_common_private.h20 return mmio_read_32(base + GICD_CTLR); in gicd_read_ctlr()
35 mmio_write_32(base + GICD_CTLR, val); in gicd_write_ctlr()
/rk3399_ARM-atf/include/drivers/arm/
H A Dgic_common.h45 #define GICD_CTLR U(0x0) macro