Searched refs:FLOWCTRL_CPU1_CSR (Results 1 – 2 of 2) sorted by relevance
28 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR),29 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 8),30 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 16)
35 #define FLOWCTRL_CPU1_CSR (0x18U) macro