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Searched refs:DFD_POWER_CTL (Results 1 – 8 of 8) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/dfd/
H A Dplat_dfd.h36 #define DFD_POWER_CTL (MISC1_CFG_BASE + 0x50) macro
H A Dplat_dfd.c63 sync_writel(DFD_POWER_CTL, 0xF9); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8188/
H A Dplat_dfd.h41 #define DFD_POWER_CTL (MISC1_CFG_BASE + 0x50) macro
H A Dplat_dfd.c41 sync_writel(DFD_POWER_CTL, 0xF9); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dfd/
H A Dplat_dfd.h44 #define DFD_POWER_CTL (MISC1_CFG_BASE + 0x50) macro
H A Dplat_dfd.c80 sync_writel(DFD_POWER_CTL, 0xF9); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8189/
H A Dplat_dfd.c31 { DFD_POWER_CTL, 0x000000F9 },
H A Dplat_dfd.h43 #define DFD_POWER_CTL (MCU_BIU_BASE + 0XE090) macro