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Searched refs:DFD_O_INTRF_MCU_PWR_CTL_MASK (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/dfd/
H A Dplat_dfd.h52 #define DFD_O_INTRF_MCU_PWR_CTL_MASK (0x10001A3C) macro
H A Dplat_dfd.c74 mmio_clrbits_32(DFD_O_INTRF_MCU_PWR_CTL_MASK, 1 << 2); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8188/
H A Dplat_dfd.h59 #define DFD_O_INTRF_MCU_PWR_CTL_MASK (0x10001A3C) macro
H A Dplat_dfd.c23 mmio_clrbits_32(DFD_O_INTRF_MCU_PWR_CTL_MASK, BIT(2)); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dfd/
H A Dplat_dfd.h62 #define DFD_O_INTRF_MCU_PWR_CTL_MASK (0x10001A3C) macro
H A Dplat_dfd.c26 mmio_clrbits_32(DFD_O_INTRF_MCU_PWR_CTL_MASK, 0x1 << 2); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8189/
H A Dplat_dfd.h173 #define DFD_O_INTRF_MCU_PWR_CTL_MASK (0x10001A3C) macro