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Searched refs:DDR01GRF_BASE (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/
H A Dpmu.c902 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0)); in ddr_sleep_config()
904 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(0)); in ddr_sleep_config()
906 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1)); in ddr_sleep_config()
908 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(1)); in ddr_sleep_config()
910 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2)); in ddr_sleep_config()
912 mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2)); in ddr_sleep_config()
914 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x20002000); in ddr_sleep_config()
915 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2), 0x20002000); in ddr_sleep_config()
916 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x08000000); in ddr_sleep_config()
917 mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2), 0x08000000); in ddr_sleep_config()
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3588/
H A Drk3588_def.h38 #define DDR01GRF_BASE 0xfd59c000 macro