902 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0));  in ddr_sleep_config()
904 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(0));  in ddr_sleep_config()
906 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1));  in ddr_sleep_config()
908 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(1));  in ddr_sleep_config()
910 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2));  in ddr_sleep_config()
912 			mmio_read_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2));  in ddr_sleep_config()
914 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x20002000);  in ddr_sleep_config()
915 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2), 0x20002000);  in ddr_sleep_config()
916 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2), 0x08000000);  in ddr_sleep_config()
917 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2), 0x08000000);  in ddr_sleep_config()
918 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0), 0x00200020);  in ddr_sleep_config()
919 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(0), 0x00200020);  in ddr_sleep_config()
920 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1), 0x00400040);  in ddr_sleep_config()
921 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(1), 0x00400040);  in ddr_sleep_config()
965 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(1),  in ddr_sleep_config_restore()
967 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(1),  in ddr_sleep_config_restore()
969 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(0),  in ddr_sleep_config_restore()
971 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(0),  in ddr_sleep_config_restore()
973 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHA_CON(2),  in ddr_sleep_config_restore()
975 		mmio_write_32(DDR01GRF_BASE + DDRGRF_CHB_CON(2),  in ddr_sleep_config_restore()