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Searched refs:CPU_PWR_STATUS (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_smp.h15 #define CPU_PWR_STATUS (MCUCFG_BASE + 0xA840) macro
H A Dmt_smp.c21 return !!(mmio_read_32(CPU_PWR_STATUS) & BIT(cpuid)); in is_core_power_status_on()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_conservation.c64 INFO("cpu_pwr = 0x%x 0x%x\n", mmio_read_32(CPU_PWR_STATUS), in go_to_spm_before_wfi()
H A Dmt_spm_reg.h95 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dspm_reg.h84 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_reg.h89 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm.h106 #define CPU_PWR_STATUS (SPM_BASE + 0x188) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_reg.h98 #define CPU_PWR_STATUS (SPM_BASE + 0x174) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_reg.h69 #define CPU_PWR_STATUS (SPM_BASE + 0x0220) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_reg.h67 #define CPU_PWR_STATUS (SPM_BASE + 0x220) macro