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Searched refs:CLK_IS_CRITICAL (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp13.c1913 .flags = CLK_IS_CRITICAL,\
1924 .flags = CLK_IS_CRITICAL,\
2141 STM32_COMPOSITE(_PLL1P, PLL1_P, _CK_PLL1, CLK_IS_CRITICAL, GATE_PLL1_DIVP, DIV_PLL1DIVP),
2144 STM32_COMPOSITE(_PLL2P, PLL2_P, _CK_PLL2, CLK_IS_CRITICAL, GATE_PLL2_DIVP, DIV_PLL2DIVP),
2146 STM32_COMPOSITE(_PLL2R, PLL2_R, _CK_PLL2, CLK_IS_CRITICAL, GATE_PLL2_DIVR, DIV_PLL2DIVR),
2158 STM32_DIV(_CKMLAHB, CK_MLAHB, MUX(MUX_MLAHB), CLK_IS_CRITICAL, DIV_MLAHB),
2174 STM32_GATE(_DDRC1, DDRC1, _CKAXI, CLK_IS_CRITICAL, GATE_DDRC1),
2175 STM32_GATE(_DDRC1LP, DDRC1LP, _CKAXI, CLK_IS_CRITICAL, GATE_DDRC1LP),
2176 STM32_GATE(_DDRPHYC, DDRPHYC, _PLL2R, CLK_IS_CRITICAL, GATE_DDRPHYC),
2177 STM32_GATE(_DDRPHYCLP, DDRPHYCLP, _PLL2R, CLK_IS_CRITICAL, GATE_DDRPHYCLP),
[all …]
H A Dclk-stm32mp2.c1384 .flags = CLK_IS_CRITICAL,\
1395 .flags = CLK_IS_CRITICAL,\
1406 .flags = CLK_IS_CRITICAL,\
1489 FLEXGEN(_CK_ICN_HS_MCU, CK_ICN_HS_MCU, CLK_IS_CRITICAL, 0),
1490 FLEXGEN(_CK_ICN_SDMMC, CK_ICN_SDMMC, CLK_IS_CRITICAL, 1),
1491 FLEXGEN(_CK_ICN_DDR, CK_ICN_DDR, CLK_IS_CRITICAL, 2),
1492 FLEXGEN(_CK_ICN_HSL, CK_ICN_HSL, CLK_IS_CRITICAL, 4),
1493 FLEXGEN(_CK_ICN_NIC, CK_ICN_NIC, CLK_IS_CRITICAL, 5),
1567 STM32_GATE(_CK_SRAM1, CK_BUS_SRAM1, _CK_ICN_HS_MCU, CLK_IS_CRITICAL, GATE_SRAM1),
1569 STM32_GATE(_CK_SRAM2, CK_BUS_SRAM2, _CK_ICN_HS_MCU, CLK_IS_CRITICAL, GATE_SRAM2),
[all …]
H A Dclk-stm32-core.h117 #define CLK_IS_CRITICAL BIT(0) macro
H A Dclk-stm32-core.c509 if ((priv->gate_refcounts[id] == 1U) && _stm32_clk_is_flags(priv, id, CLK_IS_CRITICAL)) { in _clk_stm32_disable_core()
638 if (_stm32_clk_is_flags(priv, i, CLK_IS_CRITICAL)) { in clk_stm32_enable_critical_clocks()
/rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/
H A Dpm_api_clock.h44 #define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */ macro
H A Dpm_api_clock.c528 .clkflags = (uint16_t)(CLK_IS_BASIC | CLK_IS_CRITICAL),