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Searched refs:CLK_CFG (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_cond.c38 #define CLK_CFG(id) MT_LP_TZ_TOPCK_REG(0xe0 + id * 0x10) macro
57 val = mmio_read_32(CLK_CFG(reg)); in is_clkmux_pdn()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_cond.c40 #define CLK_CFG(id) MT_LP_TZ_TOPCK_REG(0x20 + id * 0x10) macro
59 val = mmio_read_32(CLK_CFG(reg)); in is_clkmux_pdn()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_cond.c52 #define CLK_CFG(id) MT_LP_TZ_TOPCK_REG(0x98 + id * 0x10) macro
68 val = mmio_read_32(CLK_CFG(reg)); in is_clkmux_pdn()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_cond.c52 #define CLK_CFG(id) MT_LP_TZ_TOPCK_REG(0x2c + id * 0xc) macro
70 val = mmio_read_32(CLK_CFG(reg)); in check_clkmux_pdn()
/rk3399_ARM-atf/include/dt-bindings/clock/
H A Dstm32mp21-clksrc.h47 #define CLK_CFG(clk_id, sel, div, state) ((CMD_CLK << CMD_SHIFT) |\ macro
H A Dstm32mp25-clksrc.h47 #define CLK_CFG(clk_id, sel, div, state) ((CMD_CLK << CMD_SHIFT) |\ macro