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Searched refs:CLKMGR_PERPLL_PLLCX_EN (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c312 mmio_setbits_32(CLKMGR_PERPLL(PLLC0), CLKMGR_PERPLL_PLLCX_EN); in config_clkmgr_handoff()
313 mmio_setbits_32(CLKMGR_PERPLL(PLLC1), CLKMGR_PERPLL_PLLCX_EN); in config_clkmgr_handoff()
314 mmio_setbits_32(CLKMGR_PERPLL(PLLC2), CLKMGR_PERPLL_PLLCX_EN); in config_clkmgr_handoff()
315 mmio_setbits_32(CLKMGR_PERPLL(PLLC3), CLKMGR_PERPLL_PLLCX_EN); in config_clkmgr_handoff()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h189 #define CLKMGR_PERPLL_PLLCX_EN BIT(27) macro