Home
last modified time | relevance | path

Searched refs:A35_SS_PLL_FREQ2_POSTDIV2_MASK (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/drivers/st/clk/
H A Dclk-stm32mp2.c75 #define A35_SS_PLL_FREQ2_POSTDIV2_MASK GENMASK(5, 3) macro
946 postdiv2 = (mmio_read_32(pll_freq2_reg) & A35_SS_PLL_FREQ2_POSTDIV2_MASK) >> in clk_stm32_pll1_recalc_rate()
1619 mmio_clrsetbits_32(pll_freq2_reg, A35_SS_PLL_FREQ2_POSTDIV2_MASK, in stm32mp2_a35_pll1_config()
1621 A35_SS_PLL_FREQ2_POSTDIV2_MASK); in stm32mp2_a35_pll1_config()