Searched refs:A35_SS_PLL_FREQ2_POSTDIV1_MASK (Results 1 – 1 of 1) sorted by relevance
73 #define A35_SS_PLL_FREQ2_POSTDIV1_MASK GENMASK(2, 0) macro944 postdiv1 = (mmio_read_32(pll_freq2_reg) & A35_SS_PLL_FREQ2_POSTDIV1_MASK) >> in clk_stm32_pll1_recalc_rate()1615 mmio_clrsetbits_32(pll_freq2_reg, A35_SS_PLL_FREQ2_POSTDIV1_MASK, in stm32mp2_a35_pll1_config()1617 A35_SS_PLL_FREQ2_POSTDIV1_MASK); in stm32mp2_a35_pll1_config()