| /optee_os/scripts/ |
| H A D | notify_maintainers.py | 36 handles = set() 37 the_rest_handles = set() 60 allh = set() 113 existing_handles = set()
|
| H A D | get_maintainer.py | 242 emails = sorted(set(re.findall(r'[RM]:\t(.*[\w]*<[\w\.-]+@[\w\.-]+>)',
|
| /optee_os/core/drivers/ |
| H A D | stm32_shared_io.c | 32 void io_clrsetbits32_stm32shregs(vaddr_t va, uint32_t clr, uint32_t set) in io_clrsetbits32_stm32shregs() argument 36 io_clrsetbits32(va, clr, set); in io_clrsetbits32_stm32shregs()
|
| H A D | zynqmp_csu_aes.c | 46 static TEE_Result aes_wait(uint32_t event, bool set) in aes_wait() argument 58 if ((set && status == event) || (!set && status != event)) in aes_wait()
|
| /optee_os/core/arch/arm/plat-sam/ |
| H A D | sam_sfr.c | 33 void atmel_sfr_set_usb_suspend(bool set) in atmel_sfr_set_usb_suspend() argument 35 if (set) in atmel_sfr_set_usb_suspend()
|
| H A D | sam_sfr.h | 37 void atmel_sfr_set_usb_suspend(bool set);
|
| /optee_os/core/include/drivers/ |
| H A D | stm32_shared_io.h | 16 void io_clrsetbits32_stm32shregs(vaddr_t va, uint32_t clr, uint32_t set);
|
| /optee_os/core/arch/arm/crypto/ |
| H A D | sha512_armv8a_ce_a64.S | 13 .set .Lq\b, \b 14 .set .Lv\b\().2d, \b
|
| H A D | sha3_armv8a_ce_a64.S | 14 .set .Lv\b\().2d, \b 15 .set .Lv\b\().16b, \b
|
| H A D | sm3_armv8a_ce_a64.S | 13 .set .Lv\b\().4s, \b
|
| /optee_os/lib/libmbedtls/mbedtls/library/ |
| H A D | entropy.c | 527 unsigned char set = 0xFF; in mbedtls_entropy_source_self_test_check_bits() local 532 set &= buf[i]; in mbedtls_entropy_source_self_test_check_bits() 536 return set == 0xFF || unset == 0x00; in mbedtls_entropy_source_self_test_check_bits()
|
| /optee_os/core/arch/arm/kernel/ |
| H A D | arm32_sysreg.txt | 71 DCCISW c7 0 c14 2 WO Data cache clean and invalidate by set/way 74 DCCSW c7 0 c10 2 WO Data cache clean by set/way 76 DCISW c7 0 c6 2 WO Data cache invalidate by set/way
|
| /optee_os/lib/libmbedtls/mbedtls/ |
| H A D | README.md | 13 Compiler options can be set using conventional environment variables such as `CC` and `CFLAGS` when… 75 If you are cross-compiling, you must set the `CC` environment variable to a C compiler for the host… 103 You'll still be able to run a much smaller set of tests with: 133 …the test suites, but kept the programs enabled, you can still run a much smaller set of tests with: 189 Regarding variables, also note that if you set CFLAGS when invoking cmake, 200 If prompted, set `MbedTLS_DIR` to `${YOUR_MBEDTLS_INSTALL_DIR}/cmake`. This 279 …tures/security-architectures/platform-security-architecture) is a holistic set of threat models, s… 281 The [PSA cryptography API](https://arm-software.github.io/psa-api/crypto/) provides access to a set…
|
| H A D | ChangeLog | 76 * On entry to PSA driver entry points that set up a multipart operation 362 * Fixed a regression introduced in 3.6.0 where the CA callback set with 375 verify callbacks, set with mbedtls_ssl_set_verify() as opposed to 512 mbedtls_pk_copy_public_from_psa() provide ways to set up a PK context 619 MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS is set (#3266). 722 provided - these limitations are lifted in this version. A new set of 792 * Allow MBEDTLS_CONFIG_FILE and MBEDTLS_USER_CONFIG_FILE to be set by 1020 * Use HOSTCC (if it is set) when compiling C code during generation of the 1022 CC is set for cross compilation. 1125 have the most-significant bit set in their last byte. [all …]
|
| H A D | CONTRIBUTING.md | 60 Mbed TLS includes a comprehensive set of test suites in the `tests/` directory that are dynamically…
|
| /optee_os/core/drivers/pm/sam/ |
| H A D | at91_pm.c | 178 static int at91_pm_config_ws_ulp1(bool set) in at91_pm_config_ws_ulp1() argument 188 if (!set) { in at91_pm_config_ws_ulp1()
|
| /optee_os/core/lib/qcbor/ |
| H A D | README.md | 18 use can disabled. No #ifdefs or compiler options need to be set for 48 allocator be set up. Encoding of indefinite length strings is 381 All QCBOR_DISABLE_XXX are set and compiler stack frame checking is disabled 537 * Michael Richarson for CI set up and fixing some compiler warnings
|
| /optee_os/core/arch/arm/dts/ |
| H A D | stm32mp15xx-dhcom-som.dtsi | 474 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
|
| /optee_os/ |
| H A D | CHANGELOG.md | 1088 `TA_FLAG_SINGLE_INSTANCE` is not set ([#1574]) 1236 * The linux driver will set the 'privileged' flag (TEE_GEN_CAP_PRIVILEGED) on 1446 * GPIO: framework supports multiple instances, PL061 driver now has get/set
|