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Searched refs:gate (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32-core.c68 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_endisable() local
69 uintptr_t addr = priv->base + gate->offset; in stm32_gate_endisable()
72 if (gate->set_clr) in stm32_gate_endisable()
73 io_write32(addr, BIT(gate->bit_idx)); in stm32_gate_endisable()
75 io_setbits32_stm32shregs(addr, BIT(gate->bit_idx)); in stm32_gate_endisable()
82 if (gate->set_clr) in stm32_gate_endisable()
84 BIT(gate->bit_idx)); in stm32_gate_endisable()
86 io_clrbits32_stm32shregs(addr, BIT(gate->bit_idx)); in stm32_gate_endisable()
123 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_is_enabled() local
124 uintptr_t addr = priv->base + gate->offset; in stm32_gate_is_enabled()
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H A Dclk-stm32mp15.c940 static void __clk_enable(const struct stm32mp1_clk_gate *gate) in __clk_enable() argument
943 uint32_t bit = BIT(gate->bit); in __clk_enable()
945 if (gate->set_clr) in __clk_enable()
946 io_write32(base + gate->offset, bit); in __clk_enable()
948 io_setbits32_stm32shregs(base + gate->offset, bit); in __clk_enable()
950 FMSG("Clock %u has been enabled", gate->clock_id); in __clk_enable()
953 static void __clk_disable(const struct stm32mp1_clk_gate *gate) in __clk_disable() argument
956 uint32_t bit = BIT(gate->bit); in __clk_disable()
958 if (gate->set_clr) in __clk_disable()
959 io_write32(base + gate->offset + RCC_MP_ENCLRR_OFFSET, bit); in __clk_disable()
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H A Dclk-stm32mp13.c942 int gate = -1; in stm32_clk_configure_clk() local
949 gate = GATE_MCO1; in stm32_clk_configure_clk()
954 gate = GATE_MCO2; in stm32_clk_configure_clk()
967 stm32_gate_set_init_state(gate, enable); in stm32_clk_configure_clk()