Searched refs:divider (Results 1 – 3 of 3) sorted by relevance
290 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_get_value() local293 val = io_read32(priv->base + divider->offset) >> divider->shift; in stm32_div_get_value()294 val &= MASK_WIDTH_SHIFT(divider->width, 0); in stm32_div_get_value()302 const struct div_cfg *divider = NULL; in stm32_div_set_value() local309 divider = &priv->div[div_id]; in stm32_div_set_value()310 address = priv->base + divider->offset; in stm32_div_set_value()312 mask = MASK_WIDTH_SHIFT(divider->width, divider->shift); in stm32_div_set_value()313 io_clrsetbits32(address, mask, (value << divider->shift) & mask); in stm32_div_set_value()315 if (divider->ready == DIV_NO_RDY) in stm32_div_set_value()318 return stm32_gate_wait_ready((uint16_t)divider->ready, true); in stm32_div_set_value()[all …]
177 uint32_t divider; member201 if (div < p->divider) in i2c_set_prescaler()203 else if (div > q->divider) in i2c_set_prescaler()207 if (div <= p->divider) in i2c_set_prescaler()
475 * so that MCO2 behaves as a divider for the ETHRX clock here.