290 	const struct div_cfg *divider = &priv->div[div_id];  in stm32_div_get_value()  local
293 	val = io_read32(priv->base + divider->offset) >> divider->shift;  in stm32_div_get_value()
294 	val &= MASK_WIDTH_SHIFT(divider->width, 0);  in stm32_div_get_value()
302 	const struct div_cfg *divider = NULL;  in stm32_div_set_value()  local
309 	divider = &priv->div[div_id];  in stm32_div_set_value()
310 	address = priv->base + divider->offset;  in stm32_div_set_value()
312 	mask = MASK_WIDTH_SHIFT(divider->width, divider->shift);  in stm32_div_set_value()
313 	io_clrsetbits32(address, mask, (value << divider->shift) & mask);  in stm32_div_set_value()
315 	if (divider->ready == DIV_NO_RDY)  in stm32_div_set_value()
318 	return stm32_gate_wait_ready((uint16_t)divider->ready, true);  in stm32_div_set_value()
324 	const struct div_cfg *divider = &priv->div[div_id];  in stm32_div_get_rate()  local
328 	div = _get_div(divider->table, val, divider->flags, divider->width);  in stm32_div_get_rate()
339 	const struct div_cfg *divider = &priv->div[div_id];  in stm32_div_set_rate()  local
342 	value = divider_get_val(rate, prate, divider->table,  in stm32_div_set_rate()
343 				divider->width, divider->flags);  in stm32_div_set_rate()