Home
last modified time | relevance | path

Searched refs:MUX_UART1 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h121 #define MUX_UART1 38 macro
229 #define CLK_UART1_PCLK6 CLKSRC(MUX_UART1, 0)
230 #define CLK_UART1_PLL3Q CLKSRC(MUX_UART1, 1)
231 #define CLK_UART1_HSI CLKSRC(MUX_UART1, 2)
232 #define CLK_UART1_CSI CLKSRC(MUX_UART1, 3)
233 #define CLK_UART1_PLL4Q CLKSRC(MUX_UART1, 4)
234 #define CLK_UART1_HSE CLKSRC(MUX_UART1, 5)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c494 MUX_CFG(MUX_UART1, RCC_UART12CKSELR, 0, 3),
2278 0, GATE_USART1, MUX_UART1);